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 MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document by MLP2N06CL/D
SMARTDISCRETES TM Internally Clamped, Current Limited N-Channel Logic Level Power MOSFET
The MLP2N06CL is designed for applications that require a rugged power switching device with short circuit protection that can be directly interfaced to a microcontrol unit (MCU). Ideal applications include automotive fuel injector driver, incandescent lamp driver or other applications where a high in-rush current or a shorted load condition could occur. This logic level power MOSFET features current limiting for short circuit protection, integrated Gate-Source clamping for ESD protection and integral Gate-Drain clamping for over-voltage protection and Sensefet technology for low on-resistance. No additional gate series resistance is required when interfacing to the output of a MCU, but a 40 k gate pulldown resistor is recommended to avoid a floating gate condition. The internal Gate-Source and Gate-Drain clamps allow the device to be applied without use of external transient suppression components. The Gate-Source clamp protects the MOSFET input from electrostatic voltage stress up to 2.0 kV. The Gate-Drain clamp protects the MOSFET drain from the avalanche stress that occurs with inductive loads. Their unique design provides voltage clamping that is essentially independent of operating temperature. The MLP2N06CL is fabricated using Motorola's SMARTDISCRETESTM technology which combines the advantages of a power MOSFET output device with the on-chip protective circuitry that can be obtained from a standard MOSFET process. This approach offers an economical means of providing protection to power MOSFETs from harsh automotive and industrial environments. SMARTDISCRETESTM devices are specified over a wide temperature range from -50C to 150C. MAXIMUM RATINGS (TJ = 25C unless otherwise noted)
Rating Drain-to-Source Voltage Drain-to-Gate Voltage (RGS = 1.0 M) Gate-to-Source Voltage -- Continuous Drain Current -- Continuous @ TC = 25C Total Power Dissipation @ TC = 25C Electrostatic Voltage Operating and Storage Temperature Range Symbol VDSS VDGR VGS ID PD ESD TJ, Tstg Value Clamped Clamped 10 Self-limited 40 2.0 -50 to 150 Unit Vdc Vdc Vdc Adc Watts kV C
Designer'sTM Data Sheet
MLP2N06CL
Motorola Preferred Device
VOLTAGE CLAMPED CURRENT LIMITING MOSFET 62 VOLTS (CLAMPED) RDS(on) = 0.4 OHMS
D
R1 G
R2 S
G D S
THERMAL CHARACTERISTICS
Maximum Junction Temperature Thermal Resistance - Junction to Case Maximum Lead Temperature for Soldering Purposes, 1/8 from case for 5 sec. TJ(max) RJC TL 150 3.12 260 C C/W C CASE 221A-06, Style 5 TO-220AB
DRAIN-TO-SOURCE AVALANCHE CHARACTERISTICS
Single Pulse Drain-to-Source Avalanche Energy (Starting TJ = 25C, ID = 2.0 A, L = 40 mH) SMARTDISCRETES is a trademark of Motorola, Inc.
Designer's Data for "Worst Case" Conditions -- The Designer's Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit curves -- representing boundaries on device characteristics -- are given to facilitate "worst case" design. Preferred devices are Motorola recommended choices for future use and best overall value.
EAS
80
mJ
(c)Motorola TMOS Power MOSFET Transistor Device Data Motorola, Inc. 1996
1
MLP2N06CL
ELECTRICAL CHARACTERISTICS (TC = 25C unless otherwise noted)
Characteristic OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage (ID = 20 mAdc, VGS = 0 Vdc) (ID = 20 mAdc, VGS = 0 Vdc, TJ = 150C) Zero Gate Voltage Drain Current (VDS = 40 Vdc, VGS = 0 Vdc) (VDS = 40 Vdc, VGS = 0 Vdc, TJ = 150C) Gate-Source Leakage Current (VG = 5.0 Vdc, VDS = 0 Vdc) (VG = 5.0 Vdc, VDS = 0 Vdc, TJ = 150C) ON CHARACTERISTICS(1) Gate Threshold Voltage (ID = 250 Adc, VDS = VGS) (ID = 250 Adc, VDS = VGS, TJ = 150C) Static Drain Current Limit (VGS = 5.0 Vdc, VDS = 10 Vdc) (VGS = 5.0 Vdc, VDS = 10 Vdc, TJ = 150C) Static Drain-to-Source On-Resistance (ID = 1.0 Adc, VGS = 5.0 Vdc) (ID = 1.0 Adc, VGS = 5.0 Vdc, TJ = 150C) Forward Transconductance (ID = 1.0 Adc, VDS = 10 Vdc) Static Source-to-Drain Diode Voltage (IS = 1.0 Adc, VGS = 0 Vdc) SWITCHING CHARACTERISTICS(2) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time (VDD = 30 Vdc, ID = 1.0 Adc, VGS(on) = 5.0 Vdc, RGS = 25 Ohms) td(on) tr td(off) tf -- -- -- -- 1.0 3.0 5.0 3.0 1.5 5.0 8.0 5.0 s VGS(th) 1.0 0.6 ID(lim) 3.8 1.6 RDS(on) -- -- gFS VSD -- 1.1 1.5 1.0 0.3 0.53 1.4 0.4 0.7 -- mhos Vdc 4.4 2.4 5.2 2.9 Ohms 1.5 1 2.0 1.6 Adc Vdc V(BR)DSS 58 58 IDSS -- -- IGSS -- -- 0.5 1.0 5.0 20 0.6 6.0 5.0 20 Adc 62 62 66 66 Adc Vdc Symbol Min Typ Max Unit
(1) Pulse Test: Pulse Width 300 s, Duty Cycle 2%. (2) Switching characteristics are independent of operating junction temperature.
5
TJ = 25C
4.0 I D , DRAIN CURRENT (AMPS) 6.0 V 5.5 V 5.0 V 4.5 V 4.0 V 3.5 V 3.0 V 3.5 3.0 2.5 2.0 1.5 1.0 0.5 6 8 0 0
VDS 7.5 V
- 55C
25C TJ = 150C
I D , DRAIN CURRENT (AMPS)
4
3
2
1
2.5 V 2.0 V
0
0
2
4
1
2
3
4
5
6
7
8
VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
VGS, GATE-TO-SOURCE VOLTAGE (VOLTS)
Figure 1. Output Characteristics
Figure 2. Transfer Function
2
Motorola TMOS Power MOSFET Transistor Device Data
MLP2N06CL
THE SMARTDISCRETES CONCEPT From a standard power MOSFET process, several active and passive elements can be obtained that provide on-chip protection to the basic power device. Such elements require only a small increase in silicon area and/or the addition of one masking layer to the process. The resulting device exhibits significant improvements in ruggedness and reliability as well as system cost reduction. The SMARTDISCRETES device functions can now provide an economical alternative to smart power ICs for power applications requiring low on-resistance, high voltage and high current. These devices are designed for applications that require a rugged power switching device with short circuit protection that can be directly interfaced to a microcontroller unit (MCU). Ideal applications include automotive fuel injector driver, incandescent lamp driver or other applications where a high in-rush current or a shorted load condition could occur. OPERATION IN THE CURRENT LIMIT MODE The amount of time that an unprotected device can withstand the current stress resulting from a shorted load before its maximum junction temperature is exceeded is dependent upon a number of factors that include the amount of heatsinking that is provided, the size or rating of the device, its initial junction temperature, and the supply voltage. Without some form of current limiting, a shorted load can raise a device's junction temperature beyond the maximum rated operating temperature in only a few milliseconds. Even with no heatsink, the MLP2N06CL can withstand a shorted load powered by an automotive battery (10 to 14 Volts) for almost a second if its initial operating temperature is under 100C. For longer periods of operation in the current- limited mode, device heatsinking can extend operation from several seconds to indefinitely depending on the amount of heatsinking provided. SHORT CIRCUIT PROTECTION AND THE EFFECT OF TEMPERATURE The on-chip circuitry of the MLP2N06CL offers an integrated means of protecting the MOSFET component from high in-rush current or a shorted load. As shown in the schematic diagram, the current limiting feature is provided by an NPN transistor and integral resistors R1 and R2. R2 senses the current through the MOSFET and forward biases the NPN transistor's base as the current increases. As the NPN turns on, it begins to pull gate drive current through R1, dropping the gate drive voltage across it, and thus lowering the voltage across the gate-to-source of the power MOSFET and limiting the current. The current limit is temperature dependent as shown in Figure 3, and decreases from about 2.3 Amps at 25C to about 1.3 Amps at 150C. Since the MLP2N06CL continues to conduct current and dissipate power during a shorted load condition, it is important to provide sufficient heatsinking to limit the device junction temperature to a maximum of 150C. The metal current sense resistor R2 adds about 0.4 ohms to the power MOSFET's on-resistance, but the effect of temperature on the combination is less than on a standard MOSFET due to the lower temperature coefficient of R2. The on-resistance variation with temperature for gate voltages of 4 and 5 Volts is shown in Figure 5. Back-to-back polysilicon diodes between gate and source provide ESD protection to greater than 2 kV, HBM. This on-chip protection feature eliminates the need for an external Zener diode for systems with potentially heavy line transients.
6 I D(lim) , DRAIN CURRENT (AMPS) 5 4 3 2 1 0 VGS = 5 V VDS = 10 V
- 50
0
50
100
150
TJ, JUNCTION TEMPERATURE (C)
Figure 3. ID(lim) Variation With Temperature
1.0 RDS(on) , ON-RESISTANCE (OHMS) ID = 1 A 0.8
0.6 100C 25C 0.2 TJ = - 50C 0 1 7 8 2 3 4 5 6 VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) 9 10
0.4
0
Figure 4. RDS(on) Variation With Gate-To-Source Voltage
0.6 RDS(on) , ON-RESISTANCE (OHMS) ID = 1 A 0.5 0.4 0.3 0.2 0.1 0 - 50 VGS = 4 V VGS = 5 V
0 50 100 TJ, JUNCTION TEMPERATURE (C)
150
Figure 5. On-Resistance Variation With Temperature
Motorola TMOS Power MOSFET Transistor Device Data
3
MLP2N06CL
ID = 2 A 80 BV(DSS) , DRAIN-TO-SOURCE SUSTAINING VOLTAGE (VOLTS) 100 EAS , SINGLE PULSE DRAIN-TO-SOURCE AVALANCHE ENERGY (mJ) 64.0 63.5 63.0 62.5 62.0 61.5 61.0 60.5 60.0 - 50 0 50 100 TJ = JUNCTION TEMPERATURE 150 ID = 20 mA
60
40
20
0 25
50 75 100 125 TJ, STARTING JUNCTION TEMPERATURE (C)
150
Figure 6. Maximum Avalanche Energy versus Starting Junction Temperature
Figure 7. Drain-Source Sustaining Voltage Variation With Temperature
FORWARD BIASED SAFE OPERATING AREA The FBSOA curves define the maximum drain-to-source voltage and drain current that a device can safely handle when it is forward biased, or when it is on, or being turned on. Because these curves include the limitations of simultaneous high voltage and high current, up to the rating of the device, they are especially useful to designers of linear systems. The curves are based on a case temperature of 25C and a maximum junction temperature of 150C. Limitations for repetitive pulses at various case temperatures can be determined by using the thermal response curves. Motorola Application Note, AN569, "Transient Thermal Resistance -- General Data and Its Use" provides detailed instructions.
DUTY CYCLE OPERATION When operating in the duty cycle mode, the maximum drain voltage can be increased. The maximum operating temperature is related to the duty cycle (DC) by the following equation: TC = (VDS x ID x DC x RCA) + TA The maximum value of VDS applied when operating in a duty cycle mode can be approximated by: VDS = 150 - TC ID(lim) x DC x RJC
10 VGS = 10 V SINGLE PULSE TC = 25C dc 10 ms 1 ms
MAXIMUM DC VOLTAGE CONSIDERATIONS The maximum drain-to-source voltage that can be continuously applied across the MLP2N06CL when it is in current limit is a function of the power that must be dissipated. This power is determined by the maximum current limit at maximum rated operating temperature (1.8 A at 150C) and not the RDS(on). The maximum voltage can be calculated by the following equation: Vsupply = (150 - TA) ID(lim) (RJC + RCA)
ID , DRAIN CURRENT (AMPS)
1.0
RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.1 0.1 1.0 10 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) 100
where the value of RCA is determined by the heatsink that is being used in the application.
Figure 8. Maximum Rated Forward Bias Safe Operating Area (MLP2N06CL)
4
Motorola TMOS Power MOSFET Transistor Device Data
MLP2N06CL
1.0 r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE D = 0.5 0.2 0.1 0.1 0.05 0.02 0.01 SINGLE PULSE 0.01 1.0E - 05 t1 P(pk) RJC(t) = r(t) RJC D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk) - TC = P(pk) RJC(t)
t2 DUTY CYCLE, D = t1/t2 1.0E - 04 1.0E - 03 1.0E - 02 t, TIME (s) 1.0E - 01
1.0E+00
1.0E+01
Figure 9. Thermal Response (MLP2N06CL)
VDD RL Vout td(on)
ton tr 90% td(off)
toff tf 90%
Vin PULSE GENERATOR Rgen 50 50 z = 50
DUT OUTPUT, Vout INVERTED 10% 90% 50% INPUT, Vin 10% 50% PULSE WIDTH
Figure 10. Switching Test Circuit
Figure 11. Switching Waveforms
ACTIVE CLAMPING SMARTDISCRETES technology can provide on-chip realization of the popular gate-to-source and gate-to-drain Zener diode clamp elements. Until recently, such features have been implemented only with discrete components which consume board space and add system cost. The SMARTDISCRETES technology approach economically melds these features and the power chip with only a slight increase in chip area. In practice, back-to-back diode elements are formed in a polysilicon region monolithicly integrated with, but electrically isolated from, the main device structure. Each back-to-back diode element provides a temperature compensated voltage element of about 7.2 volts. As the polysilicon region is formed on top of silicon dioxide, the diode elements are free from direct interaction with the conduction regions of the power device, thus eliminating parasitic electrical effects while maintaining excellent thermal coupling. To achieve high gate-to-drain clamp voltages, several voltage elements are strung together; the MLP2N06CL uses 8 such elements. Customarily, two voltage elements are used to provide a 14.4 volt gate-to-source voltage clamp. For the MLP2N06CL, the integrated gate-to-source voltage
elements provide greater than 2.0 kV electrostatic voltage protection. The avalanche voltage of the gate-to-drain voltage clamp is set less than that of the power MOSFET device. As soon as the drain-to-source voltage exceeds this avalanche voltage, the resulting gate-to-drain Zener current builds a gate voltage across the gate-to-source impedance, turning on the power device which then conducts the current. Since virtually all of the current is carried by the power device, the gate-to-drain voltage clamp element may be small in size. This technique of establishing a temperature compensated drain-to-source sustaining voltage (Figure 7) effectively removes the possibility of drain-to-source avalanche in the power device. The gate-to-drain voltage clamp technique is particularly useful for snubbing loads where the inductive energy would otherwise avalanche the power device. An improvement in ruggedness of at least four times has been observed when inductive energy is dissipated in the gate-to-drain clamped conduction mode rather than in the more stressful gate-to- source avalanche mode.
Motorola TMOS Power MOSFET Transistor Device Data
5
MLP2N06CL
TYPICAL APPLICATIONS: INJECTOR DRIVER, SOLENOIDS, LAMPS, RELAY COILS The MLP2N06CL has been designed to allow direct interface to the output of a microcontrol unit to control an isolated load. No additional series gate resistance is required, but a 40 k gate pulldown resistor is recommended to avoid a floating gate condition in the event of an MCU failure. The internal clamps allow the device to be used without any external transistent suppressing components.
VBAT VDD
D MCU G MLP2N06CL S
PACKAGE DIMENSIONS
-T- B
4
SEATING PLANE
F T S
C
STYLE 5: PIN 1. 2. 3. 4.
GATE DRAIN SOURCE DRAIN
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. DIM A B C D F G H J K L N Q R S T U V Z INCHES MIN MAX 0.570 0.620 0.380 0.405 0.160 0.190 0.025 0.035 0.142 0.147 0.095 0.105 0.110 0.155 0.018 0.025 0.500 0.562 0.045 0.060 0.190 0.210 0.100 0.120 0.080 0.110 0.045 0.055 0.235 0.255 0.000 0.050 0.045 --- --- 0.080 MILLIMETERS MIN MAX 14.48 15.75 9.66 10.28 4.07 4.82 0.64 0.88 3.61 3.73 2.42 2.66 2.80 3.93 0.46 0.64 12.70 14.27 1.15 1.52 4.83 5.33 2.54 3.04 2.04 2.79 1.15 1.39 5.97 6.47 0.00 1.27 1.15 --- --- 2.04
Q
123
A U K
H Z L V G D N R J
CASE 221A-06 ISSUE Y
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters can and do vary in different applications. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.
How to reach us: USA / EUROPE: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. 1-800-441-2447 MFAX: RMFAX0@email.sps.mot.com - TOUCHTONE (602) 244-6609 INTERNET: http://Design-NET.com
JAPAN: Nippon Motorola Ltd.; Tatsumi-SPD-JLDC, Toshikatsu Otsuki, 6F Seibu-Butsuryu-Center, 3-14-2 Tatsumi Koto-Ku, Tokyo 135, Japan. 03-3521-8315 HONG KONG: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852-26629298
6
Motorola TMOS Power MOSFET Transistor Device Data MLP2N06CL/D
*MLP2N06CL/D*


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